#include<iostream>
#include<stdio.h>
#include<stdlib.h>
#include<string>
#include<conio.h>
#include<fstream>
#include<math.h>
using namespace std;

//data memory;

int mem[1024];

// data registers array
int dat[16];


//function prototyes

int	add (int  , int );  
int sub (int  , int );
int mul (int  , int );
int and (int  , int );
int or  (int  , int );
int xor (int  , int );
int inc (int );
int dec (int );
int shl (int );
int shr (int );
int caladd(int , int );




// R type instruction

struct inst_r             
{
	int st; // specifyes state
	int len; // instruction length (16 or 32 bit)
	char op;  // opcode
	int rs;  // destination reg
	int rt;  // source reg 1
	int rd;  // source reg 2
};
inst_r structr; // can be considered as a massive functional unit
// R type instruction 16 bit

struct inst_r2            
{
	int st; // specifyes state
	int len; // instructron length (16 or 32 bit)
	char op;  // opcode
	int rs;  // destination reg
	int rt;  // source reg 1
};
inst_r2 structr2;

// I type instruction

struct inst_i
{
	int st; // specifyes state
	int len; // instruction length (16 or 32 bit)
	int op;  // opcode
	int rs;  // destination reg
	int rt;  // source reg 
	int address; 
};
inst_i structi;

// J type instruction

struct inst_j
{
	char st; // specifyes state
	int len; // instruction length (16 or 32 bit)
	int op;  // opcode
	int rs;  // destination reg
	int rt;  // source reg 
	int address; 
};

// Temp Arrays for RAW Hazard Check

int rscheck1=100;
int rtcheck1;
int rdcheck1;
int adcheck1;
int rscheck2=100;
int rtcheck2;
int rdcheck2;
int adcheck2;



char state[5]={'F','D','1','2','W'} ;

void main()
{ 

	// initilazing data reg

    dat[0]=0;
    dat[1]=0;
	dat[7]=0;
	dat[13]=0;
	
	// initilazing data mem
	
	mem[8]=8;  // used in instruction 5
	mem[5]=5;
	int ic=3; // instruction count
	// Temp arrays for storing instructions
	char ins1[32]={0};
	char ins2[32]={0};
	char ins3[32]={0};
	char ins4[32]={0};
	char ins5[32]={0};
	char ins6[32]={0};
	//storing instructions to temp arrays
	ifstream ins;
	ins.open("pm.txt");
	
	ins>>ins1;
	ins>>ins2;
	ins>>ins3;
	ins>>ins4;
	ins>>ins5;
	ins>>ins6;

	ins.close();
	
    cout<<"instruction 1:	"<<ins1<<endl;
	cout<<"instruction 2:	"<<ins2<<endl;
	cout<<"instruction 3:	"<<ins3<<endl;
	cout<<"instruction 4:	"<<ins4<<endl;
	cout<<"instruction 5:	"<<ins5<<endl;
	cout<<"instruction 6:	"<<ins6<<endl;
	
	// converting instructions to int.
	
	int inst1[32]={0};
	for (int i=0;i<=(sizeof(ins1)-1);i++)
	{
		inst1[i]=ins1[i]-'0';
		

	}
	cout<<endl;

	int inst2[32]={0};
	for (int i=0;i<=(sizeof(ins2)-1);i++)
	{
		inst2[i]=ins2[i]-'0';
		

	}
	cout<<endl;
	int inst3[32]={0};
	for (int i=0;i<=(sizeof(ins3)-1);i++)
	{
		inst3[i]=ins3[i]-'0';
		

	}

	int inst4[32]={0};
	for (int i=0;i<=(sizeof(ins4)-1);i++)
	{
		inst4[i]=ins4[i]-'0';
		

	}
	cout<<endl;

	int inst5[32]={0};
	for (int i=0;i<=(sizeof(ins5)-1);i++)
	{
		inst5[i]=ins5[i]-'0';
		

	}
	cout<<endl;
	int inst6[32]={0};
	for (int i=0;i<=(sizeof(ins6)-1);i++)
	{
		inst6[i]=ins6[i]-'0';
		

	}

	


	int  idbuffer2[32]={0};
	char idbuffer1[32]={0};
	char itype[2]={0};
	char optype[3]={0};

	//   <<<<<<<<<<<<<<<<<<<<<< Starting Ins fetch >>>>>>>>>>>>>>>>>>>>>>>
	int inscount=1;
	while (inscount<3)

{
		//  1st ins

		if(inscount==1)
		{
	strncpy(idbuffer1,ins1,32);           

	
	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst1[i];           
	}
	cout<<endl;
		}

		// 2nd ins
		if(inscount==2)
		{
	strncpy(idbuffer1,ins2,32);           

	
	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst2[i];           
	}
	cout<<endl;
		}

	//  3rd ins

		if(inscount==3)
		{
	strncpy(idbuffer1,ins3,32);           

	
	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst3[i];           
	}
	cout<<endl;
		} 

	// 4th ins
	
		if(inscount==4)
		{
	strncpy(idbuffer1,ins4,32);           

	
	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst4[i];           
	}
	cout<<endl;
		}

	// 5th ins
		if(inscount==5)
		{
	strncpy(idbuffer1,ins5,32);           

	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst5[i];           
	}
	cout<<endl;
		}
	
	// 6th ins

		if(inscount==6)
		{
	strncpy(idbuffer1,ins6,32);           

	
	for(int i=0;i<32;i++)
	{
		idbuffer2[i]=inst6[i];           
	}
	cout<<endl;
		}
	// <<<<<<<<<<<<<<<<<<<<<<<<<<< Decode stage >>>>>>>>>>>>>>>>>>

	if (idbuffer2[0]==0)
	{ 
		// instruction decode stage 32 bit instruction
	
		//filling itype array
		cout<<endl<<"instruction type: ";
	for (int i=0;i<2;i++)
	{
		itype[i]=idbuffer1[i+1];
		cout<<itype[i];

	}
	cout<<endl;

	// filling optype array
	cout<<"operation type: ";
	for (int i=0;i<3;i++)
	{
		optype[i]=idbuffer1[i+3];
		cout<<optype[i];
	}
	cout<<endl;
	// checking for instruction type
	char rtype[2]={'0','0'};
	char iitype[2]={'1','0'};
	char jtype[2]={'1','1'};

	if ((rtype[0]==itype[0]) && (rtype[1]==itype[1]) )
	{
	cout<<"It is Rtype instruction "<<endl;
	//defining operations
	char opadd[3]={'0','0','1'};
	char opsub[3]={'0','1','0'};
	char opmul[3]={'0','1','1'};
	char opand[3]={'1','0','0'};
	char opor[3] ={'1','0','1'};
	char opxor[3]={'1','1','0'};
	char opnot[3]={'1','1','1'};
		 
	
	structr.st=0;   // defining state 0 (DI)
	structr.len=32; // instruction length = 32
	
	// checking for operation type perfromed
	if((opadd[0]==optype[0])&&(opadd[1]==optype[1])&&(opadd[2]==optype[2]))
	{
		structr.op='+';
	}

	if((opsub[0]==optype[0])&&(opsub[1]==optype[1])&&(opsub[2]==optype[2]))
	{
		structr.op='-';
	}
	if((opmul[0]==optype[0])&&(opmul[1]==optype[1])&&(opmul[2]==optype[2]))
	{
		structr.op='*';
	}
	if((opand[0]==optype[0])&&(opand[1]==optype[1])&&(opand[2]==optype[2]))
	{
		structr.op='&';
	}
	if((opor[0]==optype[0])&&(opor[1]==optype[1])&&(opor[2]==optype[2]))
	{
		structr.op='|';
	}
	if((opxor[0]==optype[0])&&(opxor[1]==optype[1])&&(opxor[2]==optype[2]))
	{
		structr.op='x';
	}
	if((opnot[0]==optype[0])&&(opnot[1]==optype[1])&&(opnot[2]==optype[2]))
	{
		structr.op='`';
	}

	// getting address of data registers
	int addrs[5];
	int addrt[5];
	int addrd[5];
	cout<<endl;
	int rs=0;
	int rt=0;
	int rd=0;
	cout<<endl<<"rs= ";
	// rs register
	int n=4;
	for (int i=0;i<5;i++)
	{
		
		addrs[i]=idbuffer2[i+6];
		
		rs=rs+(addrs[i]*pow(2,n));
		
		if(inscount==1 || inscount==3 || inscount==5)
		{
			rscheck1=rs;
		}
		else
		{
			rscheck2=rs;
		}
		
		n--;
	}
	cout<<rs<<endl<<"rt= ";
	
	// rt register
	n=4;
	for (int i=0;i<5;i++)
	{
		
		addrt[i]=idbuffer2[i+11];

		rt=rt+(addrt[i]*pow(2,n));
		
		if(inscount==1 || inscount==3 || inscount==5)
		{
			rtcheck1=rt;
		}
		else
		{
			rtcheck2=rt;
		}
		
		n--;
	}
	cout<<rt<<endl<<"rd= ";
	//rd register
	n=4;
	for (int i=0;i<5;i++)
	{
		
		addrd[i]=idbuffer2[i+16];
		
		rd=rd+(addrd[i]*pow(2,n));
	    
		if(inscount==1 || inscount==3 || inscount==5)
		{
			rdcheck1=rd;
		}
		else
		{
			rdcheck2=rd;
		}
		
		
		n--;
	}
	cout<<rd<<endl;
	// storing values from data registers to the registers rs , rt and rd
	
	structr.rs=rs;
	structr.rt=dat[rt];
	structr.rd=dat[rd];
	
     
	}
	
	else if ((iitype[0]==itype[0]) && (iitype[1]==itype[1]) )
	{
	cout<<"It is Itype instruction "<<endl;
	
	//defining operations
	char opld[2]={'0','0'};           // Load Direct    1
	char oplr[2]={'0','1'};           // LoadRid        2
	char opsd[2]={'1','0'};           // Store Direct   3
	char opsr[2]={'1','1'};           // StoreRid       4

	structi.st=0;   // defining state 0 (DI)
	structi.len=32; // instruction length = 32
	
	// checking for operation type perfromed
	if((opld[0]==optype[1])&&(opld[1]==optype[2]))
	{
		structi.op='1';  // load direct
	}
	if((oplr[0]==optype[1])&&(oplr[1]==optype[2]))
	{
		structi.op='2';  // loadrid
	}
	if((opsd[0]==optype[1])&&(opsd[1]==optype[2]))
	{
		structi.op='3';  // store direct
	}
	if((opsr[0]==optype[1])&&(opsr[1]==optype[2]))
	{
		structi.op='4';  // storerid
	}
    // getting address of data registers
	int addrs[5];
	int addrt[5];
	int address[7];            // address for reg indirect
	cout<<endl;
	int rs=0;
	int rt=0;
	int ad=0;
	cout<<endl<<"rs= ";
	// rs register
	int n=4;
	for (int i=0;i<5;i++)
	{
		
		addrs[i]=idbuffer2[i+6];
		rs=rs+(addrs[i]*pow(2,n));

		if(inscount==1 || inscount==3 || inscount==5)
		{
			rscheck1=rs;
		}
		else
		{
			rscheck2=rs;
		}
		
		n--;
	}
	cout<<rs<<endl<<"rt= ";
	
	// rt register
	n=4;
	for (int i=0;i<5;i++)
	{
		
		addrt[i]=idbuffer2[i+11];
		rt=rt+(addrt[i]*pow(2,n));
		
		if(inscount==1 || inscount==3 || inscount==5)
		{
			rtcheck1=rt;
		}
		else
		{
			rtcheck2=rt;
		}
		
		n--;
	} 
	// address
	n=6;
	cout<<rt<<endl<<"address= ";
	for (int i=0;i<6;i++)
	{
		
		addrt[i]=idbuffer2[i+16];
		ad=ad+(addrt[i]*pow(2,n));
		
		if(inscount==1 || inscount==3 || inscount==5)
		{
			adcheck1=ad;
		}
		else
		{
			adcheck2=ad;
		}
		
		
		n--;
	} 
	cout<<ad<<endl;
	
	// storing values from data registers to the registers rs , rt and rd
	
	structi.rs=rs;
	structi.rt=dat[rt];
	structi.address=ad;
	goto writeback2;


}






	else if ((jtype[0]==itype[0]) && (jtype[1]==itype[1]) )
	{
	cout<<"It is Jtype instruction "<<endl;
     
	}

	goto exestage;

	}


if (idbuffer2[0]==1)
	{
		//decoding 16 bit instruction
	

	// filling optype array
	cout<<"operation type: ";
	for (int i=0;i<3;i++)
	{
		optype[i]=idbuffer1[i+3];
		cout<<optype[i];
	}
	cout<<endl;	
	structr2.st=0;   // defining state 0 (DI)
	structr2.len=16; // instruction length = 32

	
	// defining operations for 16 bit instruction
	char opinc[3]={'0','0','0'};
	char opdec[3]={'0','0','1'};
	char opshl[3]={'0','1','0'};
	char opshr[3]={'1','0','0'};
	// checking for operation type perfromed
	if((opinc[0]==optype[0])&&(opinc[1]==optype[1])&&(opinc[2]==optype[2]))
	{
		structr2.op='I';
	}

	if((opdec[0]==optype[0])&&(opdec[1]==optype[1])&&(opdec[2]==optype[2]))
	{
		structr2.op='D';
	}
	if((opshl[0]==optype[0])&&(opshl[1]==optype[1])&&(opshl[2]==optype[2]))
	{
		structr2.op='<';
	}
	if((opshr[0]==optype[0])&&(opshr[1]==optype[1])&&(opshr[2]==optype[2]))
	{
		structr2.op='>';
	}
	// getting address of data registers
	int addrs[5];
	int addrt[5];
	int rs=0;
	int rt=0;
	cout<<endl<<"rs= ";
	// rs register
	int n=4;
	for (int i=0;i<5;i++)
	{
		
		addrs[i]=idbuffer2[i+6];
		rs=rs+(addrs[i]*pow(2,n));

		if(inscount==1 || inscount==3 || inscount==5)
		{
			rscheck1=rs;
		}
		else
		{
			rscheck2=rs;
		}
		
		n--;
	}
	cout<<rs<<endl<<"rt= ";
	
	// rt register
	n=4;
	for (int i=0;i<5;i++)
	{
		
		addrt[i]=idbuffer2[i+11];
		rt=rt+(addrt[i]*pow(2,n));

		if(inscount==1 || inscount==3 || inscount==5)
		{
			rtcheck1=rt;
		}
		else
		{
			rtcheck2=rt;
		}
		
		n--;
	}
	cout<<rt<<endl;

	// storing values from data registers to the registers rs and rt

	structr2.rs=rs;
	structr2.rt=dat[rt];

	goto exestage16;

}
	
	
	

	exestage:
	int result; // exe stage buffer 
	structr.st++;
	structr2.st++;
	structi.st++;

	switch(structr.op)   // alu operations for 32 bit
	{
		case '+':
		
			result=add(structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"+"<<structr.rd<<"="<<result<<endl;
			goto writeback;
		    break;

		case '-':
		
			result=sub(structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"-"<<structr.rd<<"="<<result<<endl;
			goto writeback;
			break;
		
		case '*':

			result=mul(structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"*"<<structr.rd<<"="<<result<<endl;
			goto writeback;
			break;

		case '&':

			result=and(structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"&"<<structr.rd<<"="<<result<<endl;
			goto writeback;
			break;

		case '|':
			result=or (structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"|"<<structr.rd<<"="<<result<<endl;
			goto writeback;
			break;


		case 'x':
			result=xor(structr.rt , structr.rd);
			cout<<endl<<"result of exe = "<<structr.rt<<"xor"<<structr.rd<<"="<<result<<endl;
			goto writeback;
			break;
			}

	exestage16:
// alu operations for 16 bit instructions
			switch(structr2.op)  
	{
		case 'I':
		
			result=inc(structr2.rt);
			cout<<endl<<"result of exe = "<<structr2.rt<<" Incremented to: "<<result<<endl;
			goto writeback16;
			break;
		
		case 'D':
		
			result=dec(structr2.rt);
			cout<<endl<<"result of exe = "<<structr2.rt<<" decremented to: "<<result<<endl;
			goto writeback16;
			break;

		case '<':
		
			result=shl(structr2.rt);
			cout<<endl<<"result of exe = "<<structr2.rt<<" after left shift: "<<result<<endl;
			goto writeback16;
			break;

		case '>':
		
			result=inc(structr2.rt);
			cout<<endl<<"result of exe = "<<structr2.rt<<" after right shift: "<<result<<endl;
			goto writeback16;
		    break;
			}


writeback:
	structr.st++;
	

	dat[structr.rs]=result; //final result of rs stored in data mem of address specifyed by rs in this case was index 15
	cout<<endl<<"final result of 32 bit instruction stored in registger # "<<structr.rs<<" is: "<<dat[structr.rs]<<endl;
	cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Hazard Checks>>>>>>>>>>>"<<endl<<endl<<endl;

	if(inscount==1 || inscount==3 || inscount==5)
		{
			cout<<"RS Check= "<<rscheck2<<endl;
			cout<<"RT Check= "<<rtcheck1<<endl;
			cout<<"RD Check= "<<rdcheck1<<endl;
			
			if(rscheck2==rtcheck1 || rscheck2==rdcheck1)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

		}
		else
		{
			cout<<"RS Check= "<<rscheck1<<endl;
			cout<<"RT Check= "<<rtcheck2<<endl;
			cout<<"RD Check= "<<rdcheck2<<endl;
			
				if(rscheck1==rtcheck2 || rscheck1==rdcheck2)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

	     }

	cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;
	goto exit;

writeback2:
	int temp=dat[structi.rt];
	int temp2=dat[structi.rt];

	switch(structi.op)   // Load or store
	{
		case '1':
		
			cout<<endl<<"loading the value at location "<<structi.address<<" of data mem to data reg "<<endl;
			dat[structi.rs]=mem[structi.address];
			cout<<"The loaded value is "<<dat[structi.rs]<<endl;
			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;
			goto exit;
		    break;
		
		case '2':
		
			cout<<endl<<"loading the value "<<structi.rt<<"into register "<<endl;
			dat[structi.rs]=mem[temp];
			cout<<"The loaded value is "<<dat[structi.rs];
			
			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Hazard Checks>>>>>>>>>>>"<<endl<<endl<<endl;

	if(inscount==1 || inscount==3 || inscount==5)
		{
			cout<<"RS Check= "<<rscheck2<<endl;
			cout<<"RT Check= "<<rtcheck1<<endl;

			if(rscheck2==rtcheck1)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

		}
		else
		{
			cout<<"RS Check= "<<rscheck1<<endl;
			cout<<"RT Check= "<<rtcheck2<<endl;
			

				if(rscheck1==rtcheck2)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

	     }
			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;
			goto exit;
			break;  
		
		case '3':
		
			cout<<endl<<"Storing the value at location "<<structi.address<<" to data mem from data reg "<<endl;
			mem[structi.rs]=dat[structi.address];
			cout<<"The stored value is "<<mem[structi.rs]<<endl;
			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;
			goto exit;
			break;
		
		case '4':
			
			cout<<endl<<"Storing the value "<<structi.rs<<" to data mem "<<endl;
			mem[structi.rs]=dat[temp2];
			cout<<"The stored value is "<<mem[structi.rs];

			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Hazard Checks>>>>>>>>>>>"<<endl<<endl<<endl;

	if(inscount==1 || inscount==3 || inscount==5)
		{
			cout<<"RS Check= "<<rscheck2<<endl;
			cout<<"RT Check= "<<rtcheck1<<endl;
			cout<<"RD Check= "<<rdcheck1<<endl;
			cout<<"AD Check= "<<adcheck1<<endl;

			if(rscheck2==rtcheck1)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

		}
		else
		{
			cout<<"RS Check= "<<rscheck1<<endl;
			cout<<"RT Check= "<<rtcheck2<<endl;
			
				if(rscheck1==rtcheck2)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

	     }
			cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;
			goto exit;
			break;

}
goto exit;		



writeback16:

structr2.st++;
dat[structr2.rs]=result; //final result of rs stored in data mem of address specifyed by rs in this case was index 15
cout<<endl<<"final resuld stored in registger # "<<structr2.rs<<" is: "<<dat[structr2.rs]<<endl;
cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Hazard Checks>>>>>>>>>>>"<<endl<<endl<<endl;

if(inscount==1 || inscount==3 || inscount==5)
		{
			cout<<"RS Check= "<<rscheck2<<endl;
			cout<<"RT Check= "<<rtcheck1<<endl;

							if(rscheck2==rtcheck1)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}


        }
		else
		{
			cout<<"RS Check= "<<rscheck1<<endl;
			cout<<"RT Check= "<<rtcheck2<<endl;

							if(rscheck1==rtcheck2)
			{
				cout<<"***********************************************************************"<<endl;
				cout<<"<<<<<<<<<< WARNING !!! RAW HAZARD DETECTED >>>>>>>>>>>>>>>"<<endl;
				cout<<"***********************************************************************"<<endl;
			}

		}


cout<<endl<<endl<<endl<<"<<<<<<<<<<<<<<<<  Executing next instruction>>>>>>>>>>>"<<endl<<endl<<endl;

	
exit:
inscount ++;
}
system("PAUSE");
	
	
}





                                                                                   // <<<<<----- Functions ----->>>>>

// <<<<<----- ALU FUNCTIONS ----->>>>>


// <<<<<----- ADD ----->>>>>

int add (int x , int y)
{
	int z= x + y;
	return z;
}

// <<<<<----- SUB ----->>>>>

int sub (int x , int y)
{
	int z=x - y;
	return z;

}
// <<<<<----- MUL ----->>>>>

int mul (int x , int y)
{
	int z=x * y;
	return z;

}

// <<<<<----- AND ----->>>>>
int and (int x , int y)
{
	int z=x & y;
	return z;

}

// <<<<<----- XOR ----->>>>>

int xor (int x , int y)
{
	int z=x ^ y;
	return z;

}

// <<<<<----- OR ----->>>>>

int or (int x , int y)
{
	int z=x | y;
	return z;

}
// <<<<<----- NOT ----->>>>>
/*
int not (int x)
{
	int x=~x;
	return x;

}
*/
// <<<<<----- INC ----->>>>>

int inc (int x)
{
	x++;
	return x;

}
// <<<<<----- DEC ----->>>>>

int dec (int x)
{
	x--;
	return x;

}
// <<<<<----- SHIFT L----->>>>>
int shl (int x)
{ 
	int y=1;
	x<<=y;
	return x;

}

// <<<<<----- SHIFT R----->>>>>
int shr (int x)
{
	int y=1;
	x>>=y;
	return x;

}

// <<<<<----- SHIFT C----->>>>>

// <<<<<----- LOAD STORE FUNCTIONS ----->>>>>

// <<<<<----- Calculate Address ----->>>>> (returns address of data mem)


int caladd(int x , int y)
{
       int z = x+y;
	   return z;
}



// <<<<<----- BRANCH AND JUMP FUNCTIONS ----->>>>>

// <<<<<----- BRANCH ----->>>>>

// <<<<<----- RETURN ----->>>>>

// <<<<<----- JEZ ----->>>>>

// <<<<<----- JNZ ----->>>>>

// <<<<<----- JUMP ----->>>>>

// <<<<<----- NOP ----->>>>>
